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MStar MSC313E MSC316DM MSC318 IP Camera SoC Datasheet SDK

MStar, the renowned semi-conductor company commits to provide cost-effective System-on-Chip for HD TVs, recently unveiled new ARM SoC for HD IP camera solution to compete with Hisilicon. MStar IPC portfolio including MSC313E and MSC316DM, as well as MSC318. Among them MSC313E and MSC316DM have widely deployed in security cameras, MSC313E supports 1080P FHD resolution, while MSC316DM supports max. 5-megapixel resolution, all SoCs embedded H.265/HEVC codec engine to catch the trend. In this article, we share the datasheet info for them, you also can download the SDK package which helps you to develop your own products.

MSC313E Pin Diagram

MSC313E SoC PIN Diagram
MSC313E SoC PIN Diagram

High Performance Processor Core

  • ARM Cortex-A7 Single Core
  • Neon and FPU
  • Memory management unit for Linux support
  • DMA Engine

Image/Video Processor

  • Supports 10-bit parallel interface for raw data input
  • Supports MIPI interface with 2 data lanes and 1 clock lane
  • Supports 8/10 bit CCIR656 interface
  • Supports 1920x1080p20fps + CIF20fps video encoding
  • Supports image snapshot (resolution will be same with the second video stream if the main stream is 1920x1080)
  • Bad pixel compensation
  • Noise reduction (NR)
  • Optical black compensation
  • Lens shading compensation
  • Auto white balance (AWB)/Auto Exposure (AE)/Auto Focus (AF)
  • CFA Color interpolation
  • Color correction
  • Video stabilization
  • Wide dynamic range
  • Rotation with 90 or 270 degree
  • Lens distortion correction
  • Fully programmable multi-function scaling engines

MStar Advanced Color Engine (MStarACE)

  • Luma gain/offset adjustment
  • Supports 2D peaking
  • Horizontal noise masking
  • Direct Luma Correction (DLC)
  • Black/White Level Extension (BLE/WLE)
  • IHC/ICC/IBC for chroma adjustment
  • Histogram statistics

Download MStar MSC313E MSC316DM MSC318 SoC SDK for Free

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H.265/HEVC Encoder

  • Supports H.265/HEVC baseline and main profile encoding
  • Supports MVs: 32x32, 16x16, 8x8
  • Supports up to quarter-pixel
  • Supports one reference frame
  • Supports max. 1920x1080p20fps encoding

H.264 Encoder

  • Supports H.264 baseline and main profile encoding
  • Supports MVs: 16x16, 16x8, 8x16, 8x8, 8x4, 4x8, 4x4
  • Supports up to quarter-pixel
  • Supports two reference frames
  • Supports rate control and ROI
  • Supports max. 1920x1080p20fps encoding

JPEG Encoder

  • Supports JPEG baseline encoding
  • Supports YUV422 or YUV420 formats
  • Supports max. 1280x960p30fps encoding

Video Encoding Performance

  • Supports 1920x1080p20fps (or 1280x960p30)+CIFp30 H.265/H.264 encoding
  • Supports MJPEG 1M (1280x720) 30fps encoding (the resolution will be the same with the 2nd video stream if the 1st stream is 1920x1080)

Audio Processor

  • One ADC for microphone input
  • One DAC for lineout
  • Supports 8K/16K/32Khz sampling rate audio encoding
  • Digital and analog gain adjustment

NOR Flash Interface

  • Compliant with standard and dual SPI falsh memory components.
  • SDIO 2.0 Interface
  • Compatible with SDIO spec. 2.0, data bus 1/4 bit mode
  • Compatible with SD spec. 2.0, data bus 1/4 bit mode
  • USB 2.0 Interface
  • Once USB 2.0 host, supports EHCI specification
  • DRAM memory
  • Embedded DDR2 DRAM memory, memory size up to 512MB

Connectivity

  • Built-in 10/100M Ethernet MAC and Ethernet PHY
  • Once USB 2.0 Host Controller could be used for USB Wi-Fi Dongle or Module
  • One SDIO 2.0 Host Controller could be used for SDIO Wi-Fi module
  • Supports Wakeup on LAN (WoL)

Security Engines

  • Supports AES/DES/TDES
  • Supports secure booting

Peripherals

  • Two generic UARTs and one fast UART with flow control
  • Three generic timers and one watchdog timer
  • One SPI masters
  • One I2C masters
  • Built-in SAR ADC with 3 channels analog inputs for different kinds of applications
  • One IR input

Operating Voltage Range

  • Core: 0.9V; I/O: 1.8-3.3V; DRAM: 1.8V; Power consumption: TBD
  • Package: S2QFN, 8mmx8mm
MStar IP Camera SoC Block Diagram